Field
This disclosure relates generally to semiconductor devices, and more specifically, to inter-level dielectric structures formed on semiconductor devices.
Related Art
Modern integrated circuits typically have conductors formed on multiple interconnect layers to accommodate dense circuitry. These conductors can be used to transfer information in the form of signals across integrated circuits. With higher performance demands, signals traversing the conductors can be required to move at very high frequencies. However, as geometries of semiconductor devices get smaller, spacing between conductors gets smaller. Smaller spacing between conductors generally causes increased parasitic capacitance impacting the speed and power of integrated circuits. Another negative aspect of increased parasitic capacitance can be increased signal crosstalk between adjacent and parallel conductors.